Faster and Low Power Twin Precision Multiplier

Faster Energy Efficient Dadda Based Baugh-Wooley Multipliers

Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders

Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates

Flysig: Dataflow Oriented Delay-Insensitive Processor for Rapid Prototyping of Signal Processing

Formulation and Development of a Novel Quaternary Algebra

FPGA Architecture for Multi-Style Asynchronous Logic

FPGA based Agile Algorithm-On-Demand Co-Processor

FPGA Implementation of a Reconfigurable Viterbi Decoder for WiMAX Receiver

FPGA implementation of real-time adaptive image thresholding

FPGA implementation of short critical path CORDIC-based approximation of the eight-point DCT

Frequency Analysis of Decoupling Capacitors for Three Voltage Supplies in SoC

Gaia Data Flow System (GDFS) project: the UK's contribution to Gaia data processing

Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation

Hard Data on Soft Errors: A Large-Scale Assessment of Real-World Error Rates in GPGPU

Hardware Accelerated Power Estimation

Hardware architectures for Successive Cancellation Decoding of Polar Codes

Hardware Implementation of Successive Cancellation Decoders for Polar Codes

Hardware Support for Arbitrarily Complex Loop Structures in Embedded Applications

Hardware Support for QoS-based Function Allocation in Reconfigurable Systems