Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates

Details Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates

2010-09-20

arxiv.org/abs/1009.3819v1

Computer Science

Hardware Architecture

9 pages, 16 figures, 2 tables, Accepted for publication in IJCEE, IACSIT, Singapore

Scientific paper

Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient design approaches of fault tolerant carry skip adders (FTCSAs) and compares those designs with the existing ones. Variable block carry skip logic (VBCSL) using the fault tolerant full adders (FTFAs) has also been developed. The designs are minimized in terms of hardware complexity, gate count, constant inputs and garbage outputs. Besides of it, technology independent evaluation of the proposed designs clearly demonstrates its superiority with the existing counterparts.

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