Computer Science – Hardware Architecture
Scientific paper
2007-10-25
Dans Design, Automation and Test in Europe | Designers'Forum - DATE'05, Munich : Allemagne (2005)
Computer Science
Hardware Architecture
Submitted on behalf of EDAA (http://www.edaa.com/)
Scientific paper
With growing computational needs of many real-world applications, frequently
changing specifications of standards, and the high design and NRE costs of
ASICs, an algorithm-agile FPGA based co-processor has become a viable
alternative. In this article, we report about the general design of an
algorith-agile co-processor and the proof-of-concept implementation.
Burman Sanjay
Kamakoti V.
Pradeep R.
Vinay S.
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