The Integration of On-Line Monitoring and Reconfiguration Functions using EDAA - European design and Automation Association1149.4 Into a Safety Critical Automotive Electronic Control Unit

The LISA Pathfinder drift mode: implementation solutions for a robust algorithm

The NASA Exoplanet Science Institute Archives: KOA and NStED

Theoretical Modeling and Simulation of Phase-Locked Loop (PLL) for Clock Data Recovery (CDR)

Thermal-Aware Task Allocation and Scheduling for Embedded Systems

Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit

Topics in asynchronous systems

Towards a Theory of Cache-Efficient Algorithms

Transactional WaveCache: Towards Speculative and Out-of-Order DataFlow Execution of Memory Operations

Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures

Universal Numeric Segmented Display

Uranus: a rapid prototyping tool for FPGA embedded computer vision

Using Mobilize Power Management IP for Dynamic & Static Power Reduction in SoC at 130 nm

Variable Block Carry Skip Logic using Reversible Gates

Versatile Data Acquisition and Controls for Epics Using Vme-Based Fpgas

Virtual-Threading: Advanced General Purpose Processors Architecture

VLSI Architectures for WIMAX Channel Decoders

VLSI Implementation of RSA Encryption System Using Ancient Indian Vedic Mathematics

Why Systems-on-Chip Needs More UML like a Hole in the Head

Wideband Spectrum Sensing at Sub-Nyquist Rates