VLSI Architectures for WIMAX Channel Decoders

Details VLSI Architectures for WIMAX Channel Decoders VLSI Architectures for WIMAX Channel Decoders

2010-01-26

arxiv.org/abs/1001.4694v1

Computer Science

Hardware Architecture

To appear in the book "WIMAX, New Developments", M. Upena, D. Dalal, Y. Kosta (Ed.), ISBN978-953-7619-53-4

Scientific paper

This chapter describes the main architectures proposed in the literature to
implement the channel decoders required by the WiMax standard, namely
convolutional codes, turbo codes (both block and convolutional) and LDPC. Then
it shows a complete design of a convolutional turbo code encoder/decoder system
for WiMax.

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