Simulating spin systems on IANUS, an FPGA-based computer

Details Simulating spin systems on IANUS, an FPGA-based computer Simulating spin systems on IANUS, an FPGA-based computer

2007-04-26

arxiv.org/abs/0704.3573v1

Computer Physics Communications, 178 (3), p.208-216, (2008)

Physics

Condensed Matter

Disordered Systems and Neural Networks

19 pages, 8 figures; submitted to Computer Physics Communications

Scientific paper

10.1016/j.cpc.2007.09.006

We describe the hardwired implementation of algorithms for Monte Carlo simulations of a large class of spin models. We have implemented these algorithms as VHDL codes and we have mapped them onto a dedicated processor based on a large FPGA device. The measured performance on one such processor is comparable to O(100) carefully programmed high-end PCs: it turns out to be even better for some selected spin models. We describe here codes that we are currently executing on the IANUS massively parallel FPGA-based system.

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