Nanoengineered Curie Temperature in Laterally-Patterned Ferromagnetic Semiconductor Heterostructures

Details Nanoengineered Curie Temperature in Laterally-Patterned Ferromagnetic Semiconductor Heterostructures Nanoengineered Curie Temperature in Laterally-Patterned Ferromagnetic Semiconductor Heterostructures

2005-01-12

arxiv.org/abs/cond-mat/0501298v2

Appl. Phys. Lett. 86, 152505 (2005).

Physics

Condensed Matter

Materials Science

Submitted to Applied Physics Letters (minor corrections)

Scientific paper

10.1063/1.1900938

We demonstrate the manipulation of the Curie temperature of buried layers of the ferromagnetic semiconductor (Ga,Mn)As using nanolithography to enhance the effect of annealing. Patterning the GaAs-capped ferromagnetic layers into nanowires exposes free surfaces at the sidewalls of the patterned (Ga,Mn)As layers and thus allows the removal of Mn interstitials using annealing. This leads to an enhanced Curie temperature and reduced resistivity compared to unpatterned samples. For a fixed annealing time, the enhancement of the Curie temperature is larger for narrower nanowires.

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