Model of tunneling transistors based on graphene on SiC

Details Model of tunneling transistors based on graphene on SiC Model of tunneling transistors based on graphene on SiC

2010-06-30

arxiv.org/abs/1006.5878v1

Appl. Phys. Lett., 96(13) 133508 (2010)

Physics

Condensed Matter

Mesoscale and Nanoscale Physics

Scientific paper

10.1063/1.3361657

Recent experiments shown that graphene epitaxially grown on Silicon Carbide (SiC) can exhibit a energy gap of 0.26 eV, making it a promising material for electronics. With an accurate model, we explore the design parameter space for a fully ballistic graphene-on-SiC Tunnel Field-Effect Transistors (TFETs), and assess the DC and high frequency figures of merit. The steep subthreshold behavior can enable I_{ON}/I_{OFF} ratios exceeding 10^4 even with a low supply voltage of 0.15 V, for devices with gatelength down to 30 nm. Intrinsic transistor delays smaller than 1 ps are obtained. These factors make the device an interesting candidate for low-power nanoelectronics beyond CMOS.

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