Enhanced Performance in Epitaxial Graphene FETs with Optimized Channel Morphology

Details Enhanced Performance in Epitaxial Graphene FETs with Optimized Channel Morphology Enhanced Performance in Epitaxial Graphene FETs with Optimized Channel Morphology

2011-11-07

arxiv.org/abs/1111.1698v1

IEEE Electron Device Letters vol. 32, pp. 1343-1345 (2011)

Physics

Condensed Matter

Mesoscale and Nanoscale Physics

Scientific paper

10.1109/LED.2011.2162934

This letter reports the impact of surface morphology on the carrier transport and RF performance of graphene FETs formed on epitaxial graphene films synthesized on SiC substrates. Such graphene exhibits long terrace structures with widths between 3-5 {\mu}m and steps of 10\pm2 nm in height. While a carrier mobility above 3000 cm2/Vs at a carrier density of 1e12 cm-2 is obtained in a single graphene terrace domain at room temperature, the step edges can result in a vicinal step resistance of ~21 k{\Omega}.{\mu}m. By orienting the transistor layout so that the entire channel lies within a single graphene terrace, and reducing the access resistance associated with the ungated part of the channel, a cut-off frequency above 200 GHz is achieved for graphene FETs with channel lengths of 210 nm, which is the highest value reported on epitaxial graphene thus far.

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