A Theoretical Investigation of Surface Roughness Scattering in Silicon Nanowire Transistors

Details A Theoretical Investigation of Surface Roughness Scattering in Silicon Nanowire Transistors A Theoretical Investigation of Surface Roughness Scattering in Silicon Nanowire Transistors

2005-02-22

arxiv.org/abs/cond-mat/0502538v1

Physics

Condensed Matter

Mesoscale and Nanoscale Physics

13 pages, 4 figures

Scientific paper

10.1063/1.2001158

In this letter, we report a three-dimensional (3D) quantum mechanical simulation to investigate the effects of surface roughness scattering (SRS) on the device characteristics of Si nanowire transistors (SNWTs). We treat the microscopic structure of the Si/SiO2 interface roughness directly by using a 3D finite element technique. The results show that 1) SRS reduces the electron density of states in the channel, which increases the SNWT threshold voltage, and 2) the SRS in SNWTs becomes more effective when more propagating modes are occupied, which implies that SRS is more important in planar metal-oxide-semiconductor field-effect-transistors with many transverse modes occupied than in small-diameter SNWTs with few modes conducting.

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