40K cryogenic rad-hard CMOS readout multiplexer fabrication process

Details 40K cryogenic rad-hard CMOS readout multiplexer fabrication process 40K cryogenic rad-hard CMOS readout multiplexer fabrication process

Jun 1994

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1994spie.2226...85c&link_type=abstract

Proc. SPIE Vol. 2226, p. 85-92, Infrared Readout Electronics II, Eric R. Fossum; Ed.

Physics

High Energy Physics

Scientific paper

Cryogenic signal processing and A/D conversion for the IR imaging and high energy physics experiment applications place severe demands on the silicon process involved, particularly in ionizing radiation environments. This paper describes a process specifically optimized for operation in the 40 K - 77 K temperature range in a total dose environment. Trade-offs of hardness, supply voltage and hot electron vulnerability are discussed and preliminary device- level results are shown.

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