2D-FFT implementation on FPGA for wavefront phase recovery from the CAFADIS camera

Details 2D-FFT implementation on FPGA for wavefront phase recovery from the CAFADIS camera 2D-FFT implementation on FPGA for wavefront phase recovery from the CAFADIS camera

Jul 2008

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2008spie.7015e..88r&link_type=abstract

Adaptive Optics Systems. Edited by Hubin, Norbert; Max, Claire E.; Wizinowich, Peter L. Proceedings of the SPIE, Volume 7015

Physics

Optics

Scientific paper

The CAFADIS camera is a new sensor patented by Universidad de La Laguna (Canary Islands, Spain): international patent PCT/ES2007/000046 (WIPO publication number WO/2007/082975). It can measure the wavefront phase and the distance to the light source at the same time in a real time process. It uses specialized hardware: Graphical Processing Units (GPUs) and Field Programmable Gates Arrays (FPGAs). These two kinds of electronic hardware present an architecture capable of handling the sensor output stream in a massively parallel approach. Of course, FPGAs are faster than GPUs, this is why it is worth it using FPGAs integer arithmetic instead of GPUs floating point arithmetic. GPUs must not be forgotten, as we have shown in previous papers, they are efficient enough to resolve several problems for AO in Extremely Large Telescopes (ELTs) in terms of time processing requirements; in addition, the GPUs show a widening gap in computing speed relative to CPUs. They are much more powerful in order to implement AO simulation than common software packages running on top of CPUs. Our paper shows an FPGA implementation of the wavefront phase recovery algorithm using the CAFADIS camera. This is done in two steps: the estimation of the telescope pupil gradients from the telescope focus image, and then the very novelty 2D-FFT over the FPGA. Time processing results are compared to our GPU implementation. In fact, what we are doing is a comparison between the two different arithmetic mentioned above, then we are helping to answer about the viability of the FPGAs for AO in the ELTs.

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