FOS Cycle 6: Discriminator Test

Details FOS Cycle 6: Discriminator Test FOS Cycle 6: Discriminator Test

Jul 1996

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1996hst..prop.6911s&link_type=abstract

HST Proposal ID #6911

Physics

Hst Proposal Id #6911

Scientific paper

The optimal discriminator settings weredetermined in Cycle 4.Because both the noise and gain are known to betemperature sensitive, it is likely that somefraction of the channels will experience somechange in their optimal discriminator settingson orbit. The discriminator/noise test shouldbe run once in cycle 5 to verify the stabilityof those settings. The FOS high voltage willbe brought to approximately one-half thenominal operating voltage (12750 KV), with theREFDAC=250 and the trim focus current at 0. A60s wait will allow the high voltage tostabilize. The command block YTDN will be run, with the INTFLAT as the source. Total time isxxx hours NON-PRIME.

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