VLSI Architectures for Computing Multiplications and Inverses in GF(2m)

Details VLSI Architectures for Computing Multiplications and Inverses in GF(2m) VLSI Architectures for Computing Multiplications and Inverses in GF(2m)

Sep 1983

adsabs.harvard.edu/abs/1983tdapr..75...52w

The Telecommunications and Data Acquisition Progress Report, TDA PR 42-75, July-September 1983, pp. 52-64

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