Scaled CMOS MEMS for real-time infrared scene generation

Details Scaled CMOS MEMS for real-time infrared scene generation Scaled CMOS MEMS for real-time infrared scene generation

Jul 2000

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2000spie.4027...91o&link_type=abstract

Proc. SPIE Vol. 4027, p. 91-100, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing V, Robert Lee Murrer; Ed.

Physics

Scientific paper

CMOS/MEMS is used as a technique to create infrared emitters. A commercial CMOS process is used that, with a post-processing silicon etch, creates thermally isolated, electronically addressable polysilicon resistors suitable for infrared scene generation. Previous efforts have focused on 2.0 micron CMOS processes which require large suspended structures in order to accommodate the design rules. This work has successfully used a 1.2 micron commercial process with a post-processing silicon etch to scale down the emitter structure to 40 X 40 microns. This allows higher density arrays, and together with using the high value poly resistor available in the 1.2 micrometer process, allows lower current operation, significantly relaxing the design constraints previously encountered. A 128 X 128 design was fabricated in this process and is characterized using a microradiometer. A silicon-on-insulator thermal pixel array design with a further reduction in emitter dimensions is also presented.

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