Computer Science – Hardware Architecture
Scientific paper
2011-12-04
Computer Science
Hardware Architecture
4 pages, 12 figures, 1 table, submitted to IJCEE for possible publication
Scientific paper
Reversible logic allows low power dissipating circuit design and founds its application in cryptography, digital signal processing, quantum and optical information processing. This paper presents a novel quantum cost efficient reversible BCD adder for nanotechnology based systems using PFAG gate. It has been demonstrated that the proposed design offers less hardware complexity and requires minimum number of garbage outputs than the existing counterparts. The remarkable property of the proposed designs is that its quantum realization is given in NMR technology.
Begum Zerina
Hafiz Zulfiquar Mohd.
Islam Saiful Md.
No associations
LandOfFree
Quantum Cost Efficient Reversible BCD Adder for Nanotechnology Based Systems does not yet have a rating. At this time, there are no reviews or comments for this scientific paper.
If you have personal experience with Quantum Cost Efficient Reversible BCD Adder for Nanotechnology Based Systems, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Quantum Cost Efficient Reversible BCD Adder for Nanotechnology Based Systems will most certainly appreciate the feedback.
Profile ID: LFWR-SCP-O-388026