Computer Science – Hardware Architecture
Scientific paper
2008-01-15
Computer Science
Hardware Architecture
Scientific paper
Pipelining is a well understood and often used implementation technique for increasing the performance of a hardware system. We develop several SystemC/C++ modeling techniques that allow us to quickly model, simulate, and evaluate pipelines. We employ a small domain specific language (DSL) based on resource usage patterns that automates the drudgery of boilerplate code needed to configure connectivity in simulation models. The DSL is embedded directly in the host modeling language SystemC/C++. Additionally we develop several techniques for parameterizing a pipeline's behavior based on policies of function, communication, and timing (performance modeling).
No associations
LandOfFree
Policies of System Level Pipeline Modeling does not yet have a rating. At this time, there are no reviews or comments for this scientific paper.
If you have personal experience with Policies of System Level Pipeline Modeling, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Policies of System Level Pipeline Modeling will most certainly appreciate the feedback.
Profile ID: LFWR-SCP-O-150432