Performance of Cache Memory Subsystems for Multicore Architectures

Details Performance of Cache Memory Subsystems for Multicore Architectures Performance of Cache Memory Subsystems for Multicore Architectures

2011-11-13

arxiv.org/abs/1111.3056v1

International Journal of Computer Science, Engineering and Applications (IJCSEA), Vol. 1, No. 5, pp. 59-71, 2011

Computer Science

Hardware Architecture

13 pages, 8 figures

Scientific paper

10.5121/ijcsea.2011.1506

Advancements in multi-core have created interest among many research groups in finding out ways to harness the true power of processor cores. Recent research suggests that on-board component such as cache memory plays a crucial role in deciding the performance of multi-core systems. In this paper, performance of cache memory is evaluated through the parameters such as cache access time, miss rate and miss penalty. The influence of cache parameters over execution time is also discussed. Results obtained from simulated studies of multi-core environments with different instruction set architectures (ISA) like ALPHA and X86 are produced.

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