On the VLSI Design of a Pipeline Reed-Solomon Decoder Using Systolic Arrays

Details On the VLSI Design of a Pipeline Reed-Solomon Decoder Using Systolic Arrays On the VLSI Design of a Pipeline Reed-Solomon Decoder Using Systolic Arrays

Sep 1987

adsabs.harvard.edu/abs/1987tdapr..91..224s

The Telecommunications and Data Acquisition Progress Report, TDA PR 42-91, July-September 1987, pp. 224-234

Physics

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