Computer Science – Hardware Architecture
Scientific paper
2012-03-22
Computer Science
Hardware Architecture
3 pages
Scientific paper
This document shows the detailed specification of LOCKE coherence protocol
for each cache controller, using a table-based technique. This representation
provides clear, concise visual information yet includes sufficient detail
(e.g., transient states) arguably lacking in the traditional, graphical form of
state diagrams.
Gregorio Jose-Angel
Menezo Lucia G.
Puente Valentin
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