Computer Science – Hardware Architecture
Scientific paper
2011-04-02
Computer Science
Hardware Architecture
Scientific paper
High speed Full-Adder (FA) module is a critical element in designing high performance arithmetic circuits. In this paper, we propose a new high speed multiple-valued logic FA module. The proposed FA is constructed by 14 transistors and 3 capacitors, using carbon nano-tube field effect transistor (CNFET) technology. Furthermore, our proposed technique has been examined in different voltages (i.e., 0.65v and 0.9v). The observed results reveal power consumption and power delay product (PDP) improvements compared to existing FA counterparts
Abdolahzadegan Shaghayegh
Khatir Ashkan
Mahmoudi Iman
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