Decting Errors in Reversible Circuits With Invariant Relationships

Details Decting Errors in Reversible Circuits With Invariant Relationships Decting Errors in Reversible Circuits With Invariant Relationships

2008-12-19

arxiv.org/abs/0812.3871v1

Computer Science

Hardware Architecture

Scientific paper

Reversible logic is experience renewed interest as we are approach the limits
of CMOS technologies. While physical implementations of reversible gates have
yet to materialize, it is safe to assume that they will rely on faulty
individual components. In this work we present a present a method to provide
fault tolerance to a reversible circuit based on invariant relationships.

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