A Giga INstruction Architecture (GINA) for the Future ESA Microprocessor Based on the LEON3 IP Core

Details A Giga INstruction Architecture (GINA) for the Future ESA Microprocessor Based on the LEON3 IP Core A Giga INstruction Architecture (GINA) for the Future ESA Microprocessor Based on the LEON3 IP Core

Jul 2006

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2006esasp.630e..75p&link_type=gif

DASIA 2006 - Data Systems in Aerospace, Proceedings of the conference held 22-25 May, 2006 in Berlin, Germany. Edited by L. Ouw

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