Design of a Virtual Component Neutral Network-on-Chip Transaction Layer

Details Design of a Virtual Component Neutral Network-on-Chip Transaction Layer Design of a Virtual Component Neutral Network-on-Chip Transaction Layer

2007-10-25

arxiv.org/abs/0710.4754v1

Dans Design, Automation and Test in Europe - DATE'05, Munich : Allemagne (2005)

Computer Science

Hardware Architecture

Submitted on behalf of EDAA (http://www.edaa.com/)

Scientific paper

Research studies have demonstrated the feasibility and advantages of Network-on-Chip (NoC) over traditional bus-based architectures but have not focused on compatibility communication standards. This paper describes a number of issues faced when designing a VC-neutral NoC, i.e. compatible with standards such as AHB 2.0, AXI, VCI, OCP, and various other proprietary protocols, and how a layered approach to communication helps solve these issues.

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