An FPGA-based readout electronics for neutrino telescopes

Details An FPGA-based readout electronics for neutrino telescopes An FPGA-based readout electronics for neutrino telescopes

Nov 2006

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2006nimpa.567..552n&link_type=abstract

Nuclear Instruments and Methods in Physics Research Section A, Volume 567, Issue 2, p. 552-555.

Physics

3

Scientific paper

Among the various elements that form part of the electronics framework of a future underwater neutrino observatory, the readout electronics is one of the most delicate and constraining, notably in terms of power requirements, long-term reliability and cost effectiveness. In this paper, an electronics developed for such a purpose is presented. First, the design constraints are outlined. The developed electronics is then described, showing its block diagram and the main functional features. Finally, some results obtained with a prototype board and some planning about future development for this device are discussed.

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