NICMOS Memory/Hardware Anomalies

Details NICMOS Memory/Hardware Anomalies NICMOS Memory/Hardware Anomalies

Jan 2003

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2003nicm.rept....2s&link_type=abstract

Instrument Science Report NICMOS 2003-002, 6 pages

Physics

Hubble Space Telescope, Hst, Space Telescope Science Institute, Nicmos

Scientific paper

NICMOS has experienced Error Detection and Correction (EDAC) single-bit EDAC errors, TPG resets, and Intel Exception problems. Except for the last error, the EDAC errors have been specific to the same memory address location. They are handled by software. A Timing Pattern Generator (TPG) reset occurs when a spurious signal is generated caused by a high energy particle event. The NICMOS flight software (FSW) was modified to handle TPG resets. An Intel Exception will suspend the instrument. There is all likelihood that additional similar EDAC errors, TPG resets, and suspends due to an Intel Exception problem will occur during the on-orbit life time of NICMOS. This ISR is intended to document the hardware errors and to be a resource when additional errors occur.

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