FOS Cycle 5: Discriminator Test

Details FOS Cycle 5: Discriminator Test FOS Cycle 5: Discriminator Test

Jul 1995

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1995hst..prop.6165k&link_type=abstract

HST Proposal ID #6165

Physics

Hst Proposal Id #6165

Scientific paper

The optimal discriminator settings were determined in Cycle 4. Because both the noise and gain are known to be temperature sensitive, it is likely that some fraction of the channels will experience some change in their optimal discriminator settings on orbit. The discriminator/noise test should be run once in cycle 5 to verify the stability of those settings. The FOS high voltage will be brought to approximately one-half the nominal operating voltage (12750 KV), with the REFDAC=250 and the trim focus current at 0. A 60s wait will allow the high voltage to stabilize. The command block YTDN will be run, with the INTFLAT as the source. Total time is xxx hours NON-PRIME.

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