Megapixel CCD thinning/backside progress at SAIC

Details Megapixel CCD thinning/backside progress at SAIC Megapixel CCD thinning/backside progress at SAIC

Jul 1991

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1991spie.1447..165s&link_type=abstract

Proc. SPIE Vol. 1447, p. 165-176, Charge-Coupled Devices and Solid State Optical Sensors II, Morley M. Blouke; Ed.

Computer Science

Performance

Scientific paper

In order to support rigorous requirements for tracking, surveillance, and astronomical applications, SAIC pursues megapixel focal plane development programs which require high performance in areas such as quantum efficiency, dynamic range, charge transfer efficiency, and total noise. To provide CCDs with these properties, special backside thinning, post- processing, anti-reflection coating, and high-speed readout capabilities have been developed in-house at SAIC. The authors discuss the thinning efforts to date on SAIC 1024 X 1024 arrays, including flattening mounts and anti-reflection coatings. Test and characterization results are presented for various chips which have been passivated using either flashgate or p(superscript +) substrate remnant. Finally, preliminary results in two related areas are discussed: initial thinning efforts on SAIC/LORAL 18 micrometers 2048 X 2048 CCDs, and electron imaging with thinned chips in a Digicon tube.

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