Computer Science – Logic in Computer Science
Scientific paper
2009-09-29
Computer Science
Logic in Computer Science
The IEEE 8th International Conference on ASIC (IEEE ASICON 2009), October 20-23 2009, Changsha, China
Scientific paper
We present a case study of formal verification of full-wave rectifier for analog and mixed signal designs. We have used the Checkmate tool from CMU [1], which is a public domain formal verification tool for hybrid systems. Due to the restriction imposed by Checkmate it necessitates to make the changes in the Checkmate implementation to implement the complex and non-linear system. Full-wave rectifier has been implemented by using the Checkmate custom blocks and the Simulink blocks from MATLAB from Math works. After establishing the required changes in the Checkmate implementation we are able to efficiently verify the safety properties of the full-wave rectifier.
Jamadagni H. S.
Lata Kusum
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