High-density packaging and interconnect of massively parallel image processors

Details High-density packaging and interconnect of massively parallel image processors High-density packaging and interconnect of massively parallel image processors

Nov 1991

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1991spie.1541..232c&link_type=abstract

Proc. SPIE Vol. 1541, p. 232-239, Infrared Sensors: Detectors, Electronics, and Signal Processing, T. S. Jayadev; Ed.

Computer Science

Performance

Scientific paper

This paper presents conceptual designs for high density packaging of parallel processing systems. The systems fall into two categories: global memory systems where many processors are packaged into a stack, and distributed memory systems where a single processor and many memory chips are packaged into a stack. Thermal behavior and performance are discussed.

Affiliated with

Also associated with

No associations

Rating

High-density packaging and interconnect of massively parallel image processors does not yet have a rating. At this time, there are no reviews or comments for this scientific paper.

If you have personal experience with High-density packaging and interconnect of massively parallel image processors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-density packaging and interconnect of massively parallel image processors will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFWR-SCP-O-1719394