VLSI partitioning of a 2-Gs/s digital spectrometer

Details VLSI partitioning of a 2-Gs/s digital spectrometer VLSI partitioning of a 2-Gs/s digital spectrometer

May 1991

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1991ijssc..26..768v&link_type=abstract

IEEE Journal of Solid-State Circuits (ISSN 0018-9200), vol. 26, May 1991, p. 768-772.

Mathematics

Logic

3

Cmos, Correlators, Digital Electronics, Gallium Arsenides, Spectrometers, Very Large Scale Integration, Analog To Digital Converters, Autocorrelation, Logic Circuits, Pipelining (Computers), Radio Astronomy

Scientific paper

A digital correlating spectrometer for radio astronomy that is based on a custom GaAs digitizer and a custom micropipelined CMOS correlator is described. The digitizer quantizes at two gigasamples per second (Gs/s) and 2-b resolution. A GaAs demultiplexer distributes the data into eight parallel streams of 250 Ms/s each. The CMOS correlator operates at 250 Ms/s using 20 mW per correlator lag. The correlator output is processed on a host microcomputer to create a 1-GHz spectrum of the input signal that can be displayed interactively. An 8 x 9-mm chip is being developed in a 2-micron process that contains 320 correlator lags. The design is partitioned into GaAs and CMOS components according to the required throughput at each stage of the system. The fastest signals (2 GHz) are kept on the chip level to minimize delay, crosstalk, system noise, and power consumption. Moderate-speed signals (250 MHz) are driven by GaAs components. CMOS components are used where high-speed outputs are not required. A strong synergy between the correlator architecture and micropipelined CMOS technology improves the performance by an order of magnitude compared to existing designs. Preliminary correlator chips have been built and tested at 250 Ms/s; final chips are under design.

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