Computer Science – Logic in Computer Science
Scientific paper
2010-09-22
EPTCS 36, 2010, pp. 101-116
Computer Science
Logic in Computer Science
In Proceedings RTRTS 2010, arXiv:1009.3982
Scientific paper
10.4204/EPTCS.36.6
The PALS architecture reduces distributed, real-time asynchronous system design to the design of a synchronous system under reasonable requirements. Assuming logical synchrony leads to fewer system behaviors and provides a conceptually simpler paradigm for engineering purposes. One of the current limitations of the framework is that from a set of independent "synchronous machines", one must compose the entire synchronous system by hand, which is tedious and error-prone. We use Maude's meta-level to automatically generate a synchronous composition from user-provided component machines and a description of how the machines communicate with each other. We then use the new capabilities to verify the correctness of a distributed topology control protocol for wireless networks in the presence of nodes that may fail.
Katelman Michael
Meseguer Jose
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