System simulation and verification facility (SSVF)

Computer Science

Scientific paper

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Space Research: Computing, Software

Scientific paper

Systems engineering tools can be used in conjunction with concurrent engineering techniques to significantly reduce the cost, schedule and risk of space mission design, development and operation. This paper describes the System Simulation and Verification Facility (SSVF) project performed by the VEGA Group PLC and ASTRIUM GmbH (formerly Dornier Satellitesysteme GmbH) for the European Space Agency's European Space Technology Centre (ESTEC). The SSVF concept integrates a high fidelity hard real-time simulator, a checkout system and control system and a common mission information-base. These components are highly configurable to enable them to support different parts of the mission lifecycle. An SSVF simulator incorporates environment, dynamics and equipment models, and interfaces to hardware, onboard software algorithms, the onboard software itself and onboard processors. SSVF is able to support what-if analyses during design and development activities, and allows the overall system hardware and software design to be validated much earlier in the mission development lifecycle than is currently the case. SSVF also supports hybrid simulations: part software models and part real hardware (breadboard, engineering or flight models). As they become available, these can be tested and validated in a high-fidelity simulated environment. The SSVF project has been performed in two phases.

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