Mathematics – Logic
Scientific paper
Sep 1999
adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1999stin...0083064s&link_type=abstract
Memoirs of the Faculty of Engineering, Miyazaki University, p. 151
Mathematics
Logic
Static Characteristics, Random Access Memory, Multiple Access, Electric Potential, Systems Engineering, Diagnosis, Simulation, Ion Implantation, Logic Circuits, Low Cost, Counters, Cmos, Circuits
Scientific paper
In this paper, a voltage mode multiple valued static random access memory (MVSRAM) with a multiple valued quantizer is described. The proposed circuit has the merits of simplicity and low cost on fabrication, since it is implemented by standard CMOs process, instead of the conventional multi-level ion implantation usually applied in the voltage-mode multi-valued logic (MVL) circuit. The performance of the proposed MVSRAM is estimated by HSPICE simulations with MOSIS 2.0 microns CMOs process parameter.
Ishizuka Okihiko
Magata Hiroshi
Syuto Makoto
Tanno Koichi
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