Spatial-spectral coherent holographic integrating processor (S2-CHIP): performance analysis and 1.0 GHz experimental demonstration

Details Spatial-spectral coherent holographic integrating processor (S2-CHIP): performance analysis and 1.0 GHz experimental demonstration Spatial-spectral coherent holographic integrating processor (S2-CHIP): performance analysis and 1.0 GHz experimental demonstration

Dec 2003

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2003spie.4988..112m&link_type=abstract

Advanced Optical Data Storage. Edited by Coufal, Hans J. Proceedings of the SPIE, Volume 4988, pp. 112-119 (2003).

Computer Science

Performance

1

Scientific paper

The design, performance analysis and experimental demonstration for an analog, broadband, high performance electro-optical signal processor are presented. The Spatial Spectral (S2) Coherent Holographic Integrating Processor, or S2-CHIP, has been developed recently as a broadband core-component for range and mid-to-high pulse repetition frequency radar-signal processing systems, as well as for lidar and radio astronomy applications. In a range radar system, if the transmit and receive RF waveforms are modulated onto a stable optical carrier, the S2 material will perform the analog correlation of the transmit and receive signals to yield the target"s range, and also coherent integrate multiple return results to increase the signal-to-noise-ratio and provide for target velocity determination. Preliminary experimental results are shown of S2-CHIP range processing using a 1.0 Gb/s data rate with 512-bit BPSK pulses. Good range resolution is observed for delays up to 1.0 microsecond. The ability of the processor"s to handle dynamic coding on the transmit RF waveforms is demonstrated.

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