SPACIROC: a rad-hard front-end readout chip for the JEM-EUSO telescope

Details SPACIROC: a rad-hard front-end readout chip for the JEM-EUSO telescope SPACIROC: a rad-hard front-end readout chip for the JEM-EUSO telescope

Dec 2010

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2010jinst...512012a&link_type=abstract

Journal of Instrumentation, Volume 5, Issue 12, pp. C12012 (2010).

Computer Science

2

Scientific paper

The SPACIROC ASIC is designed for the JEM-EUSO observatory onboard of the International Space Station (ISS). This 64 channels readout ASIC offers photon counting capability and includes a charge to time (Q-to-T) converter. The main requirement for the photon counting is to obtain a 100% trigger efficiency starting from 1/3 photoelectron (p.e.) with a 10 ns double pulse resolution. As for the Q-to-T converter, the chip needs to deliver a linear measurement for the input charges ranging from 10 p.e. to 1500 p.e. Moreover, the ASIC was designed to achieve low power consumption (1mW/channel) and radiation tolerance, in compliance with the operating constraints imposed by the ISS. The current design of the ASIC was done in collaboration with RIKEN, Japan on behalf of the JEM-EUSO consortium.

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