Rad-hard ASIC for photodetector signal processing

Computer Science – Performance

Scientific paper

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Scientific paper

A front-end ASIC designed to collect signals from CCD or CMOS photodetectors allows the realization of a compact and low-power data acquisition system, performing analogue processing and digitization. In the design of the device, fabricated using a Rad-Hard technology, several solutions have been used, both in the digital and in the analogue section, to improve the performance and to reduce the susceptibility to single event effects. The paper describes the chip design and the experimental characterization of the prototypes before and after radiation tests.

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