Output Width Signal Control In Asynchronous Digital Systems Using Monostable Circuits

Details Output Width Signal Control In Asynchronous Digital Systems Using Monostable Circuits Output Width Signal Control In Asynchronous Digital Systems Using Monostable Circuits

2009-04-23

arxiv.org/abs/0904.3714v1

Ann. Univ. Tibiscus Comp. Sci. Series IV (2006), 243-248

Computer Science

Other Computer Science

6 pages,exposed on 1st "European Conference on Computer Sciences & Applications" - XA2006, Timisoara, Romania

Scientific paper

In present paper, I propose a method for resolving the timing delays for output signals from an asynchronous sequential system. It will be used an example of an asynchronous sequential system that will set up an output signal when an input signal will be set up. The width of the output signal depends on the input signal width, and in this case it is very short. There are many synthesis methods, like using a RC group system, a monostable system in design of the asynchronous digital system or using an external clock signal, CK. In this paper will be used a monostable circuit.

Affiliated with

Also associated with

No associations

Rating

Output Width Signal Control In Asynchronous Digital Systems Using Monostable Circuits does not yet have a rating. At this time, there are no reviews or comments for this scientific paper.

If you have personal experience with Output Width Signal Control In Asynchronous Digital Systems Using Monostable Circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Output Width Signal Control In Asynchronous Digital Systems Using Monostable Circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFWR-SCP-O-409451