Computer Science – Performance
Scientific paper
Jul 2000
adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2000spie.4028..166k&link_type=abstract
Proc. SPIE Vol. 4028, p. 166-172, Infrared Detectors and Focal Plane Arrays VI, Eustace L. Dereniak; Robert E. Sampson; Eds.
Computer Science
Performance
1
Scientific paper
Noise property is the prime consideration in readout circuit design. The output noise caused by the photon noise, which dominates total noise in BLIP detectors, is limited by the integration time that an element looks at a specific point in the scene. Large integration time leads to a low noise performance. Time-delay integration (TDI) is used to effectively increase the integration time and reduce the photon noise. However, it increases the number of dead pixels and requires large integration capacitors and low noise output stage of the readout circuit. In this paper, to solve these problems, we propose a new concept of readout circuit, which performs background suppression, cell-to-cell background current non-uniformity compensation, and dead pixel correction using memory, ADC, DAC, and current copier cell. In simulation results, comparing with the conventional TDI readout circuit, the integration capacitor size can be reduced to 1/5 and trans-impedance gain can be increased by five times. Therefore, the new TDI readout circuit does not require large area and low noise output stage. And the error of skimming current is less than 2%, and the fixed pattern noise induced by cell-to-cell background current variation is reduced to less than 1%.
Kim Byunghyuck
Kim Choong-Ki
Lee Hee Chul
Yoon Nanyoung
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