Computer Science – Performance
Scientific paper
Jan 1994
adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1994phdt........19d&link_type=abstract
Thesis (PH.D.)--UNIVERSITY OF CALIFORNIA, LOS ANGELES, 1994.Source: Dissertation Abstracts International, Volume: 55-04, Sectio
Computer Science
Performance
Semiconductors, Cv Curves
Scientific paper
In this dissertation, we studied the dispersion seen in the accumulation and depletion regions of the C -V curve in n and p-channel MOS transistors as well as in reverse biased one sided abrupt junctions. From the admittance measured as a function of temperature and frequency the dopant energy level is determined. The values of the activation energy measured using the diodes agree well with the corresponding values obtained using MOS devices. We consistently measured both the ground and excited state of the phosphorus atom for the n-substrate device and only one level for the boron atom for the p-substrate devices. We confirmed our results of the conductance technique qualitatively by our Deep Level Transient Spectroscopy (DLTS) experiments. The quasi-static CV curves measured in the freeze -out regime of MOS transistors result in peaks near the accumulation or inversion regions depending on the direction of the voltage sweep. We studied these peaks in n and p-channel CMOS transistors within and outside compensating wells. The peaks in the quasi-static CV curves are attributed to the capture of minority carriers near inversion by the interface states and the capture of majority carriers by the interface states near accumulation. The quasi-static method of determination of the interface states is found to be the only method that always works in the freezeout regime. It is found to be an effective process evaluation tool. The method was found to correlate well with the charge pumping technique. Since noise is a significant factor for operation of the MOS device in the freezeout region, the low frequency noise characteristics of oxide and reoxidized-nitrided oxide (RNO) gate dielectrics were examined at low temperature in p-channel devices before and after positive F-N stress in the weak inversion regime. The RNO devices were found to have a better noise performance after F-N stress and were also found to have less interface state generation due to the warm-up process. However, the creation of a large negative fixed charge in RNO devices has a severe effect on the threshold voltage. The RNO devices showed significant (positive) threshold voltage shifts, with no change in the transconductance (g_{m }) peak. The oxide devices showed significant degradation in gm, but negative shifts in the threshold voltage. To study the effect of the boron threshold implant on device operation, we compared p-channel devices with and without implants in the freeze-out regime of operation. The drain current transient in devices with the surface implant was less pronounced than in devices without the implant. These devices also showed minimal dispersion of the capacitance curves in accumulation. Although the low frequency noise showed deviation from 1/f behavior, the noise was significantly lower in these devices with the implant. (Abstract shortened by UMI.).
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