Computer Science – Logic in Computer Science
Scientific paper
2009-12-10
EPTCS 13, 2009, pp. 41-54
Computer Science
Logic in Computer Science
Scientific paper
10.4204/EPTCS.13.4
We present a detailled timed automata model of the clock synchronization algorithm that is currently being used in a wireless sensor network (WSN) that has been developed by the Dutch company Chess. Using the Uppaal model checker, we establish that in certain cases a static, fully synchronized network may eventually become unsynchronized if the current algorithm is used, even in a setting with infinitesimal clock drifts.
Heidarian Faranak
Schuts Mathijs
Vaandrager Frits
Zhu Feng
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