Mathematics – Logic
Scientific paper
Jun 1994
adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1994spie.2226...29r&link_type=abstract
Proc. SPIE Vol. 2226, p. 29-39, Infrared Readout Electronics II, Eric R. Fossum; Ed.
Mathematics
Logic
Scientific paper
We have developed a new architecture for a superconducting high-resolution analog-to-digital converter (ADC) which is highly beneficial for IR array readout applications due to its high sensitivity, wide dynamic range and sub-mW power consumption. This ADC is based on the principles of magnetic flux quantization, direct differential coding and decimation filtering. The digital part of the ADC employs elements of the Rapid Single Flux Quantum logic family which are capable of clock frequencies in excess of 100 GHz. We discuss the limits of ADC performance and present an analysis of the power consumption in these ADCs. We also report experimental verification of several key components of this architecture in Niobium technology (operating at 4.2 K), particularly the implementation of a synchronizer unit (necessary for the generation of the differential digital code) as well as a dual-counter synchronous ADC.
Robertazzi R. P.
Rylov Sergey V.
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