High-performance CCD on high-resistivity silicon

Details High-performance CCD on high-resistivity silicon High-performance CCD on high-resistivity silicon

Aug 1998

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1998spie.3505...13s&link_type=abstract

Proc. SPIE Vol. 3505, p. 13-18, Imaging System Technology for Remote Sensing, Mingzhi Wei; Xinjian Yi; Jianzhong Han; Fiodor F.

Computer Science

3

Scientific paper

In this paper we present new results from the characterization of a fully depleted CCD on high resistivity silicon. The CCD was fabricated at Lawrence Berkeley National Laboratory on a 10-12 K(Omega) -cm n-type silicon substrate. The CCD is a 200 by 200 15-micrometers square pixel array. The high resistivity of the starting material makes it possible to deplete the entire 300 micrometers thick substrate. This results in improved red and near IR response compared to a standard CCD. Because the substrate is fully depleted, thinning of the CCD is not required for backside illumination, and the result presented here were obtained with a backside illuminated device. In this paper we present measured quantum efficiency as a function of temperature, and we describe a novel clocking scheme to measure serial charge transfer efficiency. We demonstrate an industrial application in which the CCD is more than an order of magnitude more sensitive than a commercial camera using a standard CCD.

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