Hierarchical Triple-Modular Redundancy (H-TMR) Network For Digital Systems

Details Hierarchical Triple-Modular Redundancy (H-TMR) Network For Digital Systems Hierarchical Triple-Modular Redundancy (H-TMR) Network For Digital Systems

2009-02-02

arxiv.org/abs/0902.0241v2

OncuBilim Algorithm And Systems Labs. Vol.08, Art.No:05,(2008)

Computer Science

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Scientific paper

Hierarchical application of Triple-Modular Redundancy (TMR) increases fault
tolerance of digital Integrated Circuit (IC). In this paper, a simple
probabilistic model was proposed for analysis of fault masking performance of
hierarchical TMR networks. Performance improvements obtained by second order
TMR network were theoretically compared with first order TMR network.

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