Efficient multicore-aware parallelization strategies for iterative stencil computations

Details Efficient multicore-aware parallelization strategies for iterative stencil computations Efficient multicore-aware parallelization strategies for iterative stencil computations

2010-04-10

arxiv.org/abs/1004.1741v1

Journal of Computational Science 2, 130-137 (2011)

Computer Science

Performance

15 pages, 10 figures

Scientific paper

10.1016/j.jocs.2011.01.010

Stencil computations consume a major part of runtime in many scientific simulation codes. As prototypes for this class of algorithms we consider the iterative Jacobi and Gauss-Seidel smoothers and aim at highly efficient parallel implementations for cache-based multicore architectures. Temporal cache blocking is a known advanced optimization technique, which can reduce the pressure on the memory bus significantly. We apply and refine this optimization for a recently presented temporal blocking strategy designed to explicitly utilize multicore characteristics. Especially for the case of Gauss-Seidel smoothers we show that simultaneous multi-threading (SMT) can yield substantial performance improvements for our optimized algorithm.

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