Design and fabrication concepts for a 1024 x 1024-pixel IR scene projector array

Details Design and fabrication concepts for a 1024 x 1024-pixel IR scene projector array Design and fabrication concepts for a 1024 x 1024-pixel IR scene projector array

Aug 2001

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2001spie.4366..103p&link_type=abstract

Proc. SPIE Vol. 4366, p. 103-111, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VI, Robert Lee Murrer; E

Computer Science

Scientific paper

We are currently undertaking a design and development phase for the 1024 X 1024 complexity level of infra-red scene projectors based on the emitter resistor array principle. Our approach is based as for previous complexities, on commercially available CMOS with the addition of a custom suspended resistor pixel technology applied monolithically in our own facility. We have adopted the philosophy of continuing to develop the emitter pixel technology, whilst investigating CMOS design concepts, but delaying the detail- design and procurement of the CMOS until a firm commitment to build emerges, so as to allow maximum progress in the CMOS technologies available.

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