Controlling PCI network card by single-chip processor and CPLD

Details Controlling PCI network card by single-chip processor and CPLD Controlling PCI network card by single-chip processor and CPLD

Dec 2005

adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=2005jtf....28..117c&link_type=abstract

Journal of Time and Frequency (ISSN 1001-1544), Vol. 28, No. 2, p. 117 - 123 (2005)

Mathematics

Logic

Single-Chip Processor, Cpld, Pci Bus, Ethernet

Scientific paper

The PCI local bus protocol and the PCI interface principle are introduced briefly. A design for controlling the PCI network card by single-chip processor and CPLD (complex programmable logical device) to realize Ethernet communication are presented, and the emphasis is on explaining how to design PCI interface between single chip processor and PCI network card using CPLD chip.

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