Computer Science
Scientific paper
Aug 1998
adsabs.harvard.edu/cgi-bin/nph-data_query?bibcode=1998spie.3553..138w&link_type=abstract
Proc. SPIE Vol. 3553, p. 138-145, Detectors, Focal Plane Arrays, and Imaging Devices II, Pingzhi Liang; Marc Wigdor; William G.
Computer Science
Scientific paper
In this paper, the compatibility of P(superscript +)-Ge(subscript x)Si(subscript 1-x)/p-Si heterojunction internal photoemission IR detector (HIP IRD) with its CMOS readout circuit is analyzed with a feasible approach presented. The experimental chip in which P(superscript +)-Ge(subscript x)Si(subscript 1-x)/p-Si HIP IRD and its NMOS readout switch are monolithically integrated has been fabricated with a 3 micrometers NMOS technology. The MBE grown detector without the dielectric cavity and anti-reflecting layer has a blackbody detectivity D*(subscript (500, 1000, 1)) of 1.1 X 10(superscript 9)cmHz(superscript 1/2)/W at the temperature of 77K. The selective readout of the output signals of the detectors through the NMOS readout switch at 77K has been achieved. Therefore, the feasibility of fabricating monolithically integrated P(superscript +)-Ge(subscript x)Si(subscript 1-x)/p-Si HIP IR focal plane array with NMOS readout circuit was demonstrated preliminarily.
Chen Peiyi
Li Yongkang
Tsien Peihsin
Wang Ruizhong
Zhou Junming
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