Application of the SIDECAR ASIC as the Detector Controller for ACS and the JWST Near-IR Instruments

Computer Science – Performance

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The SIDECAR ASIC is a fully integrated controller for high-performance optical and infrared detectors. It combines all functions on a single microchip, including output signal amplification and A/D conversion, bias voltage generation, clock generation, and housekeeping telemetry. The SIDECAR ASIC has been implemented into the CCD electronics box for ACS (during the SM4 repair of the instrument), and it is built into all of the JWST near-infrared instruments. The presentation will give a brief overview of the core capabilities and features of the SIDECAR ASIC, and then focus on the performance and operational aspects relevant to HST/ACS and JWST. Challenges with respect to 1/f noise on the bias voltages and overall strategies for further noise reduction will be discussed. In particular with respect to JWST, flexible data acquisition modes combined with elaborate post-processing have shown to provide significant noise improvements over the baseline approach. In this context, the full in-system programmability (even on-orbit) provides a valuable tool to adapt the operation and configuration of the SIDECAR ASIC to changing conditions.

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