An Assembler Driven Verification Methodology (ADVM)

Details An Assembler Driven Verification Methodology (ADVM) An Assembler Driven Verification Methodology (ADVM)

2007-10-25

arxiv.org/abs/0710.4852v1

Dans Design, Automation and Test in Europe | Designers'Forum - DATE'05, Munich : Allemagne (2005)

Computer Science

Other Computer Science

Submitted on behalf of EDAA (http://www.edaa.com/)

Scientific paper

This paper presents an overview of an assembler driven verification methodology (ADVM) that was created and implemented for a chip card project at Infineon Technologies AG. The primary advantage of this methodology is that it enables rapid porting of directed tests to new targets and derivatives, with only a minimum amount of code refactoring. As a consequence, considerable verification development time and effort was saved.

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